Penulis Topik: Panduan memilih SoC ARM buat hape  (Dibaca 2237 kali)

Offline descrates

  • Pro500
  • ******
  • Tulisan: 634
  • Reputation: 5074
    • Lihat Profil
Panduan memilih SoC ARM buat hape
« pada: Januari 13, 2017, 09:06:33 AM »
SoC ARM kadang ambigu, tapi ya gitu deh

1. Perhatikan "clock range"-nya misal 300 Mhz - 2.46 Ghz, bukan "clock maximal"-nya (karena ngga guna di kondisi riil)
2. Perhatikan dukungan screennya, Full HD/HD, kalo Full HD (1980x1080) kita bisa turunkan ke HD biar makin mantep ngegame
3. Perhatikan berapa mega pixel kamera belakang & kamera depannya, ini supaya bisa forcing ke perekaman video 4K
4. Perhatikan "cache" procie, sia-sia kalo SoC mahal tapi cache kecil (ini kadang luput dari mata)
5. Perhatikan "audio card" karena memang ini vital buat dengerin musik

kenapa tidak memperhatikan GPU? karena GPU aslinya ya "seputar itu-itu aja"
beda kelas kalo dibandingkan x86/x86-64

kira-kira itu doang yang penting
kalo ngerti ini dijamin nggak bakalan salah pilih
kalo di android ya bundling sih, jadi susah
jalan satu-satunya ya ngerancang produk sendiri
TASKKILL /F /IM SMΔRTP.exe /T

Win7 32bit [kernel patch] --- 2x2,8GHz Intel --- 8GB RAM DDR3 --- 512MB 9600M GT NVidia --- Iron 15 beta --- Opera Mini Proxies

other OS: Lucid Puppy, XP SP2 [custom], XP SP3, Win7 64bit, Tails

Offline descrates

  • Pro500
  • ******
  • Tulisan: 634
  • Reputation: 5074
    • Lihat Profil
Re:Panduan memilih SoC ARM buat hape
« Jawab #1 pada: Januari 14, 2017, 06:03:18 AM »
untuk sekedar gambaran aja, ambil contoh

Qualcomm Snapdragon 820 (Kyro)
Cores   4 (2+2)
L1 cache   32 KiB + 32 KiB
L2 cache   512 KiB (slow cores) + 1 MiB (fast cores)

Apple A9X
Cores   2
L1 cache   Per core: 64 KiB instruction + 64 KiB data
L2 cache   3 MiB shared

maka bisa ditebak kalo Snapdragon 820 sekelas dengan A9X
meskipun kalah clock dibandingkan Snapdragon 820 tapi dari segi cache A9X lebih handal
TASKKILL /F /IM SMΔRTP.exe /T

Win7 32bit [kernel patch] --- 2x2,8GHz Intel --- 8GB RAM DDR3 --- 512MB 9600M GT NVidia --- Iron 15 beta --- Opera Mini Proxies

other OS: Lucid Puppy, XP SP2 [custom], XP SP3, Win7 64bit, Tails

Offline descrates

  • Pro500
  • ******
  • Tulisan: 634
  • Reputation: 5074
    • Lihat Profil
Re:Panduan memilih SoC ARM buat hape
« Jawab #2 pada: Januari 14, 2017, 10:23:06 AM »
sampai saat ini SoC ARM memang agak konyol kalo soal "cache"
gw sendiri bingung kenapa "cache" sengaja ditahan

kalo kita taruh teori "RISC" ya bikin aja spek

L1 cache per core : 256 KiB instruction + 256 KiB data
L2 cache 16 MiB shared
L3 cache 24 MiB

maka cukup 10nm nm FinFET atau die size sekitar 300mm2
bisa buat bikin procie kelas server "low end" di hape
TASKKILL /F /IM SMΔRTP.exe /T

Win7 32bit [kernel patch] --- 2x2,8GHz Intel --- 8GB RAM DDR3 --- 512MB 9600M GT NVidia --- Iron 15 beta --- Opera Mini Proxies

other OS: Lucid Puppy, XP SP2 [custom], XP SP3, Win7 64bit, Tails

Offline descrates

  • Pro500
  • ******
  • Tulisan: 634
  • Reputation: 5074
    • Lihat Profil
Re:Panduan memilih SoC ARM buat hape
« Jawab #3 pada: September 20, 2017, 09:56:00 AM »
bulan ini dunia procie ARM dikejutkan oleh procie A11 yang ngalahin Sanpdragon 835
dari data bisa diamati kalau cache L2 di A11 udah mulai dibuka meskipun L1 dikurangin
padahal kalo L1 dibuka performa akan berlipat ganda (bisa-bisa Snapdragon tidak laku)

L1 cache   32 KB instruction, 32 KB data
L2 cache   8 MB
L3 cache   none
TASKKILL /F /IM SMΔRTP.exe /T

Win7 32bit [kernel patch] --- 2x2,8GHz Intel --- 8GB RAM DDR3 --- 512MB 9600M GT NVidia --- Iron 15 beta --- Opera Mini Proxies

other OS: Lucid Puppy, XP SP2 [custom], XP SP3, Win7 64bit, Tails

Offline descrates

  • Pro500
  • ******
  • Tulisan: 634
  • Reputation: 5074
    • Lihat Profil
Re:Panduan memilih SoC ARM buat hape
« Jawab #4 pada: September 23, 2017, 12:04:53 PM »
baru saja mikir, makin lama makin ketebak
kalo melihat data, kemungkinan SoC ARM sekelas Snapdragon 845
konfigurasinya seperti ini (jadi mirip A10X deh)

L1 cache   Per core: 64 KiB instruction + 64 KiB data (estimated)
L2 cache   3 MiB (estimated)
L3 cache   4 MiB (estimated)

jumlah transistor sekitar 5 M lebih

kalau begitu mungkin A11 tinggal buka saja L1 cache ke 64 KiB (atau lebih)
dan tambah core (kalo perlu L3 cache diadakan)

teorinya gini kalo A11X-A12-A12X-A13 (lanjutannya juga pake big.LITTLE), gw copas aja daripada capek
tapi lumayan lama buat realisasinya

The ring big.LITTLE-logy had a lot of combos (it ran very very fast, if up to 3.0GHz with Parallel-JIT). The Ring should run at up to 3.0GHz, while the current technology and L3-cache runs at at between 1.6GHz and 2.8GHz. As result, the L3-cache latency was pretty low: if the core is lucky enough to find the data in its own cache slice, only one extra cycle is needed (on top of the normal L1-L2-L3 latency). Getting a cacheline of another slice can cost up to 4 cycles, with an average cost of 2 cycles. Still, according to SoC the average latency to the L3-cache is only 30-10% higher, and the power usage is lower. Peak memory bandwidth and capacity is quite a bit higher with 4 dies and 2 memory channels per die. However, there is no central last level cache that can perform low latency data coordination between the L2-caches of the different cores. The latency difference between accessing a local L3-cache chunk and one further away is negligible on average, allowing the L3-cache to be a central storage for fast data synchronization between the L2-caches. As result, the 8x8 MiB L3-caches acts like - relatively low latency - spill over caches for the 32 L2-caches on one chip. 

nb: berarti range harga SoC max 50 USD, wkwkwk (kalo pake cache gede)
« Edit Terakhir: September 23, 2017, 12:11:45 PM oleh descrates »
TASKKILL /F /IM SMΔRTP.exe /T

Win7 32bit [kernel patch] --- 2x2,8GHz Intel --- 8GB RAM DDR3 --- 512MB 9600M GT NVidia --- Iron 15 beta --- Opera Mini Proxies

other OS: Lucid Puppy, XP SP2 [custom], XP SP3, Win7 64bit, Tails